A New Method for Specification of Parameters to Path Delay Faults Testing
نویسندگان
چکیده
Technology scaling and manufacturing process affect the performance of digital circuits, making them more vulnerable to environmental influences. Some defects are shown as delay faults therefore their testing is very important, mainly path delay faults. Such faults are tested over critical paths which have to be specified in a digital circuit. A problem of the critical paths selection is discussed in this paper. Some various factors have impact to signal propagation delay. A new method is presented for determining the measurement of the parameters impact on the path delay in the digital circuit. The method is focused to find the best weights of parameters for system PaCGen (Parameterized Critical Path Generator). The PaCGen is system for critical paths selection based on static timing analysis data with impact of factors to propagation delay. Accordingly, the critical paths are selected to be used for simulating fault coverage of path delay faults on transition delay fault model. Experimental results are provided using the ISCAS’89 benchmark circuits.
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